Pdp8

It has been almost a year since I got a different implementation of my PDP-8/e replica project for my birthday.

Yes, it was a cake, and I have neglected to share it with the world so far. To be fair, there was a time this year where everything was a cake, at least on Twitter, and adding another one would have just been pouring gasoline on the fire.

But here it is, first a side by side comparison of the implementations:

A few weeks back, I was showing my PDP-8/e project at the Vintage Computer Festival in Zurich. While I was doing my project, I haven’t really checked if there were other projects like this. At least for the PDP-8 I knew there wasn’t, the only FPGA core I could find was a new implementation of the architecture that is binary compatible but doesn’t attempt to replicate the structure and instruction cycles of any specific PDP-8.

This is, at long last, part 3 of the overview of my PDP-8/e replica project and offers some details of the low-level implementation.

I have mentioned that I build my PDP-8/e replica from the original schematics. The great thing about the PDP-8/e is that it is still built in discrete logic rather than around a microprocessor, meaning that schematics of the actual CPU logic are available instead of just programmer’s documentation. After all, with so many chips on multiple boards something is bound to break down sooner or later and technicians need schematics to diagnose and fix that¹. In addition, there’s a maintenance manual that very helpfully describes the workings of every little part of the CPU with excerpts of the full schematics, but it has some inaccuracies and occasionally outright errors in the excerpts so the schematics are still indispensable.

This is an overview of the hardware and internals of the PDP-8/e replica I’m building.

The front panel board

If you know the original or remember the picture from the first post it is clear that this is a functional replica not aiming to be as pretty as those of the other projects I mentioned. I have reordered the switches into two rows to make the board more compact (which also means cheaper) without sacrificing usability.

I am creating a replica of the DEC PDP-8/e architecture in an FPGA from schematics of the original hardware. So how did I end up with a project like this?

The story begins with me wanting to have a computer with one of those front panels that have many, many lights where you can really see, in real time, what the computer is doing while it is executing code. Not because I am nostalgic for a prior experience with any of those — I was born a bit too late for that and my first computer as a kid was a Commodore 64.